1. Field of the Invention
This invention relates generally to testing of integrated circuits with scan paths and particularly relates to testing integrated circuits with parallel scan distributors and collectors controlled by a controller that includes a state machine.
2. Description of the Invention
Cost effective testing of today""s complex integrated circuits is extremely important to semiconductor manufacturers from a profit and loss standpoint. The increases in complexity of state-of-the-art integrated circuits is being accompanied by an ever increasing difficulty to test the integrated circuits. New test techniques must be developed to offset this increasing integrated circuit test cost, otherwise further advancements in future integrated circuit technology may be blocked. One emerging technology that is going to accelerate the complexity of integrated circuits even more is intellectual property cores. These cores will provide highly complex pre-designed circuit functions such as; DSPs, CPUs, I/O peripherals, memories, and mixed signal A/D and D/A functions. These cores will exist in a library and can be selected and placed in an integrated circuit quickly to provide a complex circuit function. The low cost testing of integrated circuits that contain highly complex core functions will be a significant challenge
The claimed invention provides an integrated circuit comprising core circuitry including functional inputs and functional outputs, an input pad and an output pad. Scan distributor circuitry connects between the input pad and, selectively, at least some of the functional inputs, typically through a multiplexer. Scan collector circuitry connects selectively between at least some of the functional outputs and the output pad, typically through a demultiplexer. Controller circuitry controls the operation of the distributor and collector. This provides for using the scan distributor and collector circuitry to test the core circuitry through its functional inputs and outputs.
On an integrated circuit with plural cores or core circuitry, each core can be provided with its own, internal scan distributor, collector, and controller circuitry. This avoids having to add the scan circuitry outside of the core circuits. The scan circuitry in the different cores are joined together by connecting together the functional inputs and outputs of the cores. This can provide a hierarchy of scan distributor, collector, and controller circuitry.